1. Field of the Invention
The present invention generally relates to a tone generator and, more particularly, to a large scale integration chip of the tone generator circuit composed of a sound source block containing a digital signal processor (DSP), and a central processing unit (CPU) mounted on a single semiconductor substrate together with the sound source block.
2. Description of Related Art
Generally, the tone generator is composed of a MIDI (Musical Instrument Digital Interface), a performance input block in which performance information is inputted from a keyboard or a sequencer, a sound source block for generating waveforms of tones, and a CPU for controlling the sound source block according the inputted performance information. The CPU executes driver processing of the sound source block such as channel assignment and parameter conversion according to the inputted performance information, and supplies the converted parameters and note events to assigned channels of the sound source block. The sound source block generates tone data based on the parameters stored in a sound source register. In the case of a wave table method, waveform data is read out from a waveform memory, an envelope is applied to the waveform data, and an effect is imparted to the envelope-applied waveform data by use of a DSP to provide tones.
The CPU is connected to a ROM (Read Only Memory) in which a control program is stored and is connected to a RAM (Random Access Memory) for use as a work area of the CPU. The sound source block is connected to the waveform memory (ROM or RAM) for storing waveform data and a delay memory (RAM) for use by the DSP to impart an effect such as delay. Consequently, four separate memory devices must be arranged if they are provided in the form of discrete components. With recent advancements in semiconductor fabrication technology, it has become possible to use a tone generator chip having the CPU and the sound source block, both of which are mounted on and integrated in a common semiconductor substrate.
However, the above-mentioned tone generator chip with the CPU and the sound source block mounted on the single semiconductor substrate has only one external bus for access to a memory device. Therefore, the configuration of using the external bus by the CPU and the sound source block is uniquely determined. This prevents the tone generator chip from being used flexibly in matching with grades of electronic musical instruments containing the tone generator chip. The sole data bus of the tone generator chip is connected to a memory which stores a program for use by the CPU and waveform data for use by the sound source block. The sharing of the data bus between the CPU and the sound source block restricts the operation of the CPU, thereby limiting the application of the tone generator chip to those electronic musical instruments of comparatively low grades.